483 lines
14 KiB
Python
483 lines
14 KiB
Python
# decompyle3 version 3.9.0
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# Python bytecode version base 3.7.0 (3394)
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# Decompiled from: Python 3.7.16 (default, Mar 30 2023, 01:25:49)
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# [GCC 12.2.1 20220924]
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# Embedded file name: libs/base/bl616/bootheader_cfg_keys.py
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clock_start_pos = 100
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bootcfg_start_pos = 120
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bootcfg_len = 48
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bootcpucfg_start_pos = bootcfg_start_pos + bootcfg_len
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bootcpucfg_len = 16
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bootcpucfg_m0_index = 0
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bootcpucfg_d0_index = 1
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bootcpucfg_lp_index = 2
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boot2_start_pos = bootcpucfg_start_pos + bootcpucfg_len * (bootcpucfg_m0_index + 1)
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boot2_len = 8
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flashcfg_table_start_pos = boot2_start_pos + boot2_len
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flashcfg_table_len = 8
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patch_on_read_start_pos = flashcfg_table_start_pos + flashcfg_table_len
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patch_on_read_len = 24
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patch_on_jump_start_pos = patch_on_read_start_pos + patch_on_read_len
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patch_on_jump_len = 24
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rsvd_start_pos = patch_on_jump_start_pos + patch_on_jump_len
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rsvd_len = 4
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crc32_start_pos = rsvd_start_pos + rsvd_len
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bootheader_len = crc32_start_pos + 4
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bootheader_cfg_keys = {'magic_code':{'offset':'0',
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'pos':'0',
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'bitlen':'32'},
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'revision':{'offset':'4',
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'pos':'0',
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'bitlen':'32'},
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'flashcfg_magic_code':{'offset':'8',
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'pos':'0',
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'bitlen':'32'},
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'io_mode':{'offset':'12',
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'pos':'0',
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'bitlen':'8'},
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'cont_read_support':{'offset':'12',
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'pos':'8',
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'bitlen':'8'},
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'sfctrl_clk_delay':{'offset':'12',
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'pos':'16',
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'bitlen':'8'},
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'sfctrl_clk_invert':{'offset':'12',
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'pos':'24',
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'bitlen':'8'},
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'reset_en_cmd':{'offset':'16',
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'pos':'0',
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'bitlen':'8'},
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'reset_cmd':{'offset':'16',
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'pos':'8',
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'bitlen':'8'},
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'exit_contread_cmd':{'offset':'16',
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'pos':'16',
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'bitlen':'8'},
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'exit_contread_cmd_size':{'offset':'16',
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'pos':'24',
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'bitlen':'8'},
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'jedecid_cmd':{'offset':'20',
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'pos':'0',
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'bitlen':'8'},
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'jedecid_cmd_dmy_clk':{'offset':'20',
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'pos':'8',
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'bitlen':'8'},
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'enter_32bits_addr_cmd':{'offset':'20',
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'pos':'16',
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'bitlen':'8'},
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'exit_32bits_addr_clk':{'offset':'20',
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'pos':'24',
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'bitlen':'8'},
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'sector_size':{'offset':'24',
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'pos':'0',
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'bitlen':'8'},
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'mfg_id':{'offset':'24',
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'pos':'8',
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'bitlen':'8'},
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'page_size':{'offset':'24',
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'pos':'16',
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'bitlen':'16'},
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'chip_erase_cmd':{'offset':'28',
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'pos':'0',
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'bitlen':'8'},
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'sector_erase_cmd':{'offset':'28',
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'pos':'8',
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'bitlen':'8'},
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'blk32k_erase_cmd':{'offset':'28',
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'pos':'16',
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'bitlen':'8'},
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'blk64k_erase_cmd':{'offset':'28',
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'pos':'24',
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'bitlen':'8'},
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'write_enable_cmd':{'offset':'32',
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'pos':'0',
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'bitlen':'8'},
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'page_prog_cmd':{'offset':'32',
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'pos':'8',
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'bitlen':'8'},
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'qpage_prog_cmd':{'offset':'32',
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'pos':'16',
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'bitlen':'8'},
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'qual_page_prog_addr_mode':{'offset':'32',
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'pos':'24',
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'bitlen':'8'},
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'fast_read_cmd':{'offset':'36',
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'pos':'0',
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'bitlen':'8'},
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'fast_read_dmy_clk':{'offset':'36',
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'pos':'8',
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'bitlen':'8'},
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'qpi_fast_read_cmd':{'offset':'36',
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'pos':'16',
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'bitlen':'8'},
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'qpi_fast_read_dmy_clk':{'offset':'36',
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'pos':'24',
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'bitlen':'8'},
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'fast_read_do_cmd':{'offset':'40',
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'pos':'0',
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'bitlen':'8'},
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'fast_read_do_dmy_clk':{'offset':'40',
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'pos':'8',
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'bitlen':'8'},
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'fast_read_dio_cmd':{'offset':'40',
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'pos':'16',
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'bitlen':'8'},
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'fast_read_dio_dmy_clk':{'offset':'40',
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'pos':'24',
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'bitlen':'8'},
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'fast_read_qo_cmd':{'offset':'44',
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'pos':'0',
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'bitlen':'8'},
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'fast_read_qo_dmy_clk':{'offset':'44',
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'pos':'8',
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'bitlen':'8'},
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'fast_read_qio_cmd':{'offset':'44',
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'pos':'16',
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'bitlen':'8'},
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'fast_read_qio_dmy_clk':{'offset':'44',
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'pos':'24',
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'bitlen':'8'},
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'qpi_fast_read_qio_cmd':{'offset':'48',
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'pos':'0',
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'bitlen':'8'},
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'qpi_fast_read_qio_dmy_clk':{'offset':'48',
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'pos':'8',
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'bitlen':'8'},
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'qpi_page_prog_cmd':{'offset':'48',
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'pos':'16',
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'bitlen':'8'},
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'write_vreg_enable_cmd':{'offset':'48',
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'pos':'24',
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'bitlen':'8'},
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'wel_reg_index':{'offset':'52',
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'pos':'0',
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'bitlen':'8'},
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'qe_reg_index':{'offset':'52',
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'pos':'8',
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'bitlen':'8'},
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'busy_reg_index':{'offset':'52',
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'pos':'16',
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'bitlen':'8'},
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'wel_bit_pos':{'offset':'52',
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'pos':'24',
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'bitlen':'8'},
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'qe_bit_pos':{'offset':'56',
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'pos':'0',
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'bitlen':'8'},
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'busy_bit_pos':{'offset':'56',
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'pos':'8',
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'bitlen':'8'},
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'wel_reg_write_len':{'offset':'56',
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'pos':'16',
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'bitlen':'8'},
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'wel_reg_read_len':{'offset':'56',
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'pos':'24',
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'bitlen':'8'},
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'qe_reg_write_len':{'offset':'60',
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'pos':'0',
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'bitlen':'8'},
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'qe_reg_read_len':{'offset':'60',
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'pos':'8',
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'bitlen':'8'},
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'release_power_down':{'offset':'60',
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'pos':'16',
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'bitlen':'8'},
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'busy_reg_read_len':{'offset':'60',
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'pos':'24',
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'bitlen':'8'},
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'reg_read_cmd0':{'offset':'64',
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'pos':'0',
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'bitlen':'8'},
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'reg_read_cmd1':{'offset':'64',
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'pos':'8',
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'bitlen':'8'},
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'reg_write_cmd0':{'offset':'68',
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'pos':'0',
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'bitlen':'8'},
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'reg_write_cmd1':{'offset':'68',
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'pos':'8',
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'bitlen':'8'},
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'enter_qpi_cmd':{'offset':'72',
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'pos':'0',
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'bitlen':'8'},
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'exit_qpi_cmd':{'offset':'72',
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'pos':'8',
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'bitlen':'8'},
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'cont_read_code':{'offset':'72',
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'pos':'16',
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'bitlen':'8'},
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'cont_read_exit_code':{'offset':'72',
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'pos':'24',
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'bitlen':'8'},
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'burst_wrap_cmd':{'offset':'76',
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'pos':'0',
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'bitlen':'8'},
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'burst_wrap_dmy_clk':{'offset':'76',
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'pos':'8',
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'bitlen':'8'},
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'burst_wrap_data_mode':{'offset':'76',
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'pos':'16',
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'bitlen':'8'},
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'burst_wrap_code':{'offset':'76',
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'pos':'24',
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'bitlen':'8'},
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'de_burst_wrap_cmd':{'offset':'80',
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'pos':'0',
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'bitlen':'8'},
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'de_burst_wrap_cmd_dmy_clk':{'offset':'80',
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'pos':'8',
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'bitlen':'8'},
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'de_burst_wrap_code_mode':{'offset':'80',
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'pos':'16',
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'bitlen':'8'},
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'de_burst_wrap_code':{'offset':'80',
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'pos':'24',
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'bitlen':'8'},
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'sector_erase_time':{'offset':'84',
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'pos':'0',
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'bitlen':'16'},
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'blk32k_erase_time':{'offset':'84',
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'pos':'16',
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'bitlen':'16'},
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'blk64k_erase_time':{'offset':'88',
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'pos':'0',
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'bitlen':'16'},
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'page_prog_time':{'offset':'88',
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'pos':'16',
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'bitlen':'16'},
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'chip_erase_time':{'offset':'92',
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'pos':'0',
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'bitlen':'16'},
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'power_down_delay':{'offset':'92',
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'pos':'16',
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'bitlen':'8'},
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'qe_data':{'offset':'92',
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'pos':'24',
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'bitlen':'8'},
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'flashcfg_crc32':{'offset':'96',
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'pos':'0',
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'bitlen':'32'},
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'clkcfg_magic_code':{'offset':str(int(clock_start_pos) + 0),
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'pos':'0',
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'bitlen':'32'},
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'xtal_type':{'offset':str(int(clock_start_pos) + 4),
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'pos':'0',
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'bitlen':'8'},
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'mcu_clk':{'offset':str(int(clock_start_pos) + 4),
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'pos':'8',
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'bitlen':'8'},
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'mcu_clk_div':{'offset':str(int(clock_start_pos) + 4),
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'pos':'16',
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'bitlen':'8'},
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'mcu_bclk_div':{'offset':str(int(clock_start_pos) + 4),
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'pos':'24',
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'bitlen':'8'},
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'mcu_pbclk_div':{'offset':str(int(clock_start_pos) + 8),
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'pos':'0',
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'bitlen':'8'},
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'emi_clk':{'offset':str(int(clock_start_pos) + 8),
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'pos':'8',
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'bitlen':'8'},
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'emi_clk_div':{'offset':str(int(clock_start_pos) + 8),
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'pos':'16',
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'bitlen':'8'},
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'flash_clk_type':{'offset':str(int(clock_start_pos) + 8),
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'pos':'24',
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'bitlen':'8'},
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'flash_clk_div':{'offset':str(int(clock_start_pos) + 12),
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'pos':'0',
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'bitlen':'8'},
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'wifipll_pu':{'offset':str(int(clock_start_pos) + 12),
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'pos':'8',
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'bitlen':'8'},
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'aupll_pu':{'offset':str(int(clock_start_pos) + 12),
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'pos':'16',
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'bitlen':'8'},
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'rsvd0':{'offset':str(int(clock_start_pos) + 12),
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'pos':'24',
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'bitlen':'8'},
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'clkcfg_crc32':{'offset':str(int(clock_start_pos) + 16),
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'pos':'0',
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'bitlen':'32'},
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'sign':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'0',
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'bitlen':'2'},
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'encrypt_type':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'2',
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'bitlen':'2'},
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'key_sel':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'4',
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'bitlen':'2'},
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'xts_mode':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'6',
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'bitlen':'1'},
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'aes_region_lock':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'7',
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'bitlen':'1'},
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'no_segment':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'8',
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'bitlen':'1'},
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'boot2_enable':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'9',
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'bitlen':'1'},
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'boot2_rollback':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'10',
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'bitlen':'1'},
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'cpu_master_id':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'11',
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'bitlen':'4'},
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'notload_in_bootrom':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'15',
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'bitlen':'1'},
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'crc_ignore':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'16',
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'bitlen':'1'},
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'hash_ignore':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'17',
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'bitlen':'1'},
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'power_on_mm':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'18',
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'bitlen':'1'},
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'em_sel':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'19',
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'bitlen':'3'},
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'cmds_en':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'22',
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'bitlen':'1'},
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'cmds_wrap_mode':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'23',
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'bitlen':'2'},
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'cmds_wrap_len':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'25',
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'bitlen':'4'},
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'icache_invalid':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'29',
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'bitlen':'1'},
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'dcache_invalid':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'30',
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'bitlen':'1'},
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'fpga_halt_release':{'offset':str(int(bootcfg_start_pos) + 0),
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'pos':'31',
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'bitlen':'1'},
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'group_image_offset':{'offset':str(int(bootcfg_start_pos) + 4),
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'pos':'0',
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'bitlen':'32'},
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'aes_region_len':{'offset':str(int(bootcfg_start_pos) + 8),
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'pos':'0',
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'bitlen':'32'},
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'img_len_cnt':{'offset':str(int(bootcfg_start_pos) + 12),
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'pos':'0',
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'bitlen':'32'},
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'hash_0':{'offset':str(int(bootcfg_start_pos) + 16),
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'pos':'0',
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'bitlen':'32'},
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'hash_1':{'offset':str(int(bootcfg_start_pos) + 20),
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'pos':'0',
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'bitlen':'32'},
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'hash_2':{'offset':str(int(bootcfg_start_pos) + 24),
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'pos':'0',
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'bitlen':'32'},
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'hash_3':{'offset':str(int(bootcfg_start_pos) + 28),
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'pos':'0',
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'bitlen':'32'},
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'hash_4':{'offset':str(int(bootcfg_start_pos) + 32),
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'pos':'0',
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'bitlen':'32'},
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'hash_5':{'offset':str(int(bootcfg_start_pos) + 36),
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'pos':'0',
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'bitlen':'32'},
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'hash_6':{'offset':str(int(bootcfg_start_pos) + 40),
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'pos':'0',
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'bitlen':'32'},
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'hash_7':{'offset':str(int(bootcfg_start_pos) + 44),
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'pos':'0',
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'bitlen':'32'},
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'm0_config_enable':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'0',
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'bitlen':'8'},
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'm0_halt_cpu':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'8',
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'bitlen':'8'},
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'm0_cache_enable':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'16',
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'bitlen':'1'},
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'm0_cache_wa':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'17',
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'bitlen':'1'},
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'm0_cache_wb':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'18',
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'bitlen':'1'},
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'm0_cache_wt':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'19',
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'bitlen':'1'},
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'm0_cache_way_dis':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'20',
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'bitlen':'4'},
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'm0_reserved':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 0),
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'pos':'24',
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'bitlen':'8'},
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'm0_image_address_offset':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 4),
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'pos':'0',
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'bitlen':'32'},
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'm0_boot_entry':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 8),
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'pos':'0',
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'bitlen':'32'},
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'm0_msp_val':{'offset':str(int(bootcpucfg_start_pos + bootcpucfg_len * bootcpucfg_m0_index) + 12),
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'pos':'0',
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'bitlen':'32'},
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'boot2_pt_table_0':{'offset':str(int(boot2_start_pos) + 0),
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'pos':'0',
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'bitlen':'32'},
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'boot2_pt_table_1':{'offset':str(int(boot2_start_pos) + 4),
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'pos':'0',
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'bitlen':'32'},
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'flashCfgTableAddr':{'offset':str(int(flashcfg_table_start_pos) + 0),
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'pos':'0',
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'bitlen':'32'},
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'flashCfgTableLen':{'offset':str(int(flashcfg_table_start_pos) + 4),
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'pos':'0',
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'bitlen':'32'},
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'patch_read_addr0':{'offset':str(int(patch_on_read_start_pos) + 0),
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'pos':'0',
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'bitlen':'32'},
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'patch_read_value0':{'offset':str(int(patch_on_read_start_pos) + 4),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_read_addr1':{'offset':str(int(patch_on_read_start_pos) + 8),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_read_value1':{'offset':str(int(patch_on_read_start_pos) + 12),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_read_addr2':{'offset':str(int(patch_on_read_start_pos) + 16),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_read_value2':{'offset':str(int(patch_on_read_start_pos) + 20),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_addr0':{'offset':str(int(patch_on_jump_start_pos) + 0),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_value0':{'offset':str(int(patch_on_jump_start_pos) + 4),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_addr1':{'offset':str(int(patch_on_jump_start_pos) + 8),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_value1':{'offset':str(int(patch_on_jump_start_pos) + 12),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_addr2':{'offset':str(int(patch_on_jump_start_pos) + 16),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'patch_jump_value2':{'offset':str(int(patch_on_jump_start_pos) + 20),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'reserved':{'offset':str(int(rsvd_start_pos) + 0),
|
|
'pos':'0',
|
|
'bitlen':'32'},
|
|
'crc32':{'offset':str(int(crc32_start_pos) + 0),
|
|
'pos':'0',
|
|
'bitlen':'32'}}
|
|
# okay decompiling ./libs/base/bl616/bootheader_cfg_keys.pyc
|