197 lines
3.7 KiB
Plaintext
197 lines
3.7 KiB
Plaintext
|
[EFUSE_CFG]
|
||
|
########################################################################
|
||
|
#2bits
|
||
|
ef_sf_aes_mode = 0
|
||
|
#2bits
|
||
|
ef_sboot_sign_mode = 0
|
||
|
#2bits
|
||
|
ef_sboot_en = 0
|
||
|
#2bits
|
||
|
ef_dbg_jtag_dis = 0
|
||
|
#4bits
|
||
|
ef_dbg_mode = 0
|
||
|
#32bits
|
||
|
ef_dbg_pwd_low = 0
|
||
|
#32bits
|
||
|
ef_dbg_pwd_high = 0
|
||
|
###################################################################
|
||
|
ef_key_slot_2_w0 = 0
|
||
|
ef_key_slot_2_w1 = 0
|
||
|
ef_key_slot_2_w2 = 0
|
||
|
ef_key_slot_2_w3 = 0
|
||
|
ef_key_slot_3_w0 = 0
|
||
|
ef_key_slot_3_w1 = 0
|
||
|
ef_key_slot_3_w2 = 0
|
||
|
ef_key_slot_3_w3 = 0
|
||
|
ef_key_slot_4_w0 = 0
|
||
|
ef_key_slot_4_w1 = 0
|
||
|
ef_key_slot_4_w2 = 0
|
||
|
ef_key_slot_4_w3 = 0
|
||
|
|
||
|
wr_lock_key_slot_4_l = 0
|
||
|
wr_lock_dbg_pwd = 0
|
||
|
wr_lock_key_slot_2 = 0
|
||
|
wr_lock_key_slot_3 = 0
|
||
|
wr_lock_key_slot_4_h = 0
|
||
|
rd_lock_dbg_pwd = 0
|
||
|
rd_lock_key_slot_2 = 0
|
||
|
rd_lock_key_slot_3 = 0
|
||
|
rd_lock_key_slot_4 = 0
|
||
|
|
||
|
[BOOTHEADER_CFG]
|
||
|
magic_code = 0x504e4642
|
||
|
revision = 0x01
|
||
|
#########################flash cfg#############################
|
||
|
flashcfg_magic_code = 0x47464346
|
||
|
#flashcfg_magic_code=0
|
||
|
io_mode = 0x10
|
||
|
cont_read_support = 0
|
||
|
sfctrl_clk_delay = 0
|
||
|
sfctrl_clk_invert = 0x03
|
||
|
|
||
|
reset_en_cmd = 0x66
|
||
|
reset_cmd = 0x99
|
||
|
exit_contread_cmd = 0xff
|
||
|
exit_contread_cmd_size = 3
|
||
|
|
||
|
jedecid_cmd = 0x9f
|
||
|
jedecid_cmd_dmy_clk = 0
|
||
|
qpi_jedecid_cmd = 0x9f
|
||
|
qpi_jedecid_dmy_clk = 0
|
||
|
|
||
|
sector_size = 4
|
||
|
mfg_id = 0xff
|
||
|
page_size = 256
|
||
|
|
||
|
chip_erase_cmd = 0xc7
|
||
|
sector_erase_cmd = 0x20
|
||
|
blk32k_erase_cmd = 0x52
|
||
|
blk64k_erase_cmd = 0xd8
|
||
|
|
||
|
write_enable_cmd = 0x06
|
||
|
page_prog_cmd = 0x02
|
||
|
qpage_prog_cmd = 0x32
|
||
|
qual_page_prog_addr_mode = 0
|
||
|
|
||
|
fast_read_cmd = 0x0b
|
||
|
fast_read_dmy_clk = 1
|
||
|
qpi_fast_read_cmd = 0x0b
|
||
|
qpi_fast_read_dmy_clk = 1
|
||
|
|
||
|
fast_read_do_cmd = 0x3b
|
||
|
fast_read_do_dmy_clk = 1
|
||
|
fast_read_dio_cmd = 0xbb
|
||
|
fast_read_dio_dmy_clk = 0
|
||
|
|
||
|
fast_read_qo_cmd = 0x6b
|
||
|
fast_read_qo_dmy_clk = 1
|
||
|
fast_read_qio_cmd = 0xeb
|
||
|
fast_read_qio_dmy_clk = 2
|
||
|
|
||
|
qpi_fast_read_qio_cmd = 0xeb
|
||
|
qpi_fast_read_qio_dmy_clk = 2
|
||
|
qpi_page_prog_cmd = 0x02
|
||
|
write_vreg_enable_cmd = 0x50
|
||
|
|
||
|
wel_reg_index = 0
|
||
|
qe_reg_index = 1
|
||
|
busy_reg_index = 0
|
||
|
wel_bit_pos = 1
|
||
|
|
||
|
qe_bit_pos = 1
|
||
|
busy_bit_pos = 0
|
||
|
wel_reg_write_len = 2
|
||
|
wel_reg_read_len = 1
|
||
|
|
||
|
qe_reg_write_len = 2
|
||
|
qe_reg_read_len = 1
|
||
|
release_power_down = 0xab
|
||
|
busy_reg_read_len = 1
|
||
|
|
||
|
reg_read_cmd0 = 0x05
|
||
|
reg_read_cmd1 = 0x35
|
||
|
|
||
|
reg_write_cmd0 = 0x01
|
||
|
reg_write_cmd1 = 0x01
|
||
|
|
||
|
enter_qpi_cmd = 0x38
|
||
|
exit_qpi_cmd = 0xff
|
||
|
cont_read_code = 0xa0
|
||
|
cont_read_exit_code = 0xff
|
||
|
|
||
|
burst_wrap_cmd = 0x77
|
||
|
burst_wrap_dmy_clk = 0x03
|
||
|
burst_wrap_data_mode = 2
|
||
|
burst_wrap_code = 0x40
|
||
|
|
||
|
de_burst_wrap_cmd = 0x77
|
||
|
de_burst_wrap_cmd_dmy_clk = 0x03
|
||
|
de_burst_wrap_code_mode = 2
|
||
|
de_burst_wrap_code = 0xF0
|
||
|
|
||
|
sector_erase_time = 300
|
||
|
blk32k_erase_time = 1200
|
||
|
|
||
|
blk64k_erase_time = 1200
|
||
|
page_prog_time = 5
|
||
|
|
||
|
chip_erase_time = 200000
|
||
|
power_down_delay = 20
|
||
|
qe_data = 0
|
||
|
|
||
|
flashcfg_crc32 = 0
|
||
|
|
||
|
#########################clk cfg####################################
|
||
|
clkcfg_magic_code = 0x47464350
|
||
|
#clkcfg_magic_code=0
|
||
|
|
||
|
#0:Not use XTAL to set PLL, 1:XTAL is 32M, 2:XTAL is RC32M
|
||
|
xtal_type = 1
|
||
|
#0:RC32M, 1:XTAL, 2:PLL 57.6M, 3:PLL 96M, 4:PLL 144M
|
||
|
pll_clk = 1
|
||
|
hclk_div = 0
|
||
|
bclk_div = 0
|
||
|
#0:144M, 1:XCLK(RC32M or XTAL), 2:57.6M, 3:72M, 4:BCLK, 5:96M
|
||
|
flash_clk_type = 1
|
||
|
flash_clk_div = 0
|
||
|
clkcfg_crc32 = 0
|
||
|
|
||
|
########################boot cfg####################################
|
||
|
#1:ECC
|
||
|
sign = 0
|
||
|
#1:AES128,2:AES256,3:AES192
|
||
|
encrypt_type = 0
|
||
|
key_sel = 1
|
||
|
no_segment = 1
|
||
|
cache_enable = 1
|
||
|
notload_in_bootrom = 0
|
||
|
aes_region_lock = 0
|
||
|
cache_way_disable = 0x00
|
||
|
crc_ignore = 1
|
||
|
hash_ignore = 1
|
||
|
boot2_enable=1
|
||
|
boot2_rollback=0
|
||
|
|
||
|
########################image cfg####################################
|
||
|
#total image len or segment count
|
||
|
img_len = 0x100
|
||
|
bootentry = 0
|
||
|
#img RAM address or flash offset
|
||
|
img_start = 0x2000
|
||
|
|
||
|
#img hash
|
||
|
hash_0 = 0xdeadbeef
|
||
|
hash_1 = 0
|
||
|
hash_2 = 0
|
||
|
hash_3 = 0
|
||
|
hash_4 = 0
|
||
|
hash_5 = 0
|
||
|
hash_6 = 0
|
||
|
hash_7 = 0
|
||
|
|
||
|
#address of partition tables for boot2 in bootrom
|
||
|
boot2_pt_table_0=0x1000
|
||
|
boot2_pt_table_1=0x2000
|
||
|
|
||
|
crc32 = 0xdeadbeef
|