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No commits in common. "afefafd92977b0e2be79d5edb25bae32b085803f" and "42ee296a37a5739b8f4020f27b5c76fc86b8a820" have entirely different histories.
afefafd929
...
42ee296a37
5
.gitignore
vendored
5
.gitignore
vendored
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|
@ -1,7 +1,8 @@
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|||
__pycache__
|
||||
env/
|
||||
bin/
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||||
lib/
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||||
lib64
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||||
pyvenv.cfg
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||||
log/
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||||
*.bin
|
||||
*.ini
|
||||
whole_img.pack
|
||||
|
|
|
|||
|
|
@ -117,8 +117,8 @@ class MainClass:
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|||
else:
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||||
filedir = config.get(item, 'filedir')
|
||||
address = config.get(item, 'address')
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||||
if not self.get_value_file(item, filedir, address, args.cpu_id):
|
||||
return False
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||||
if not self.get_value_file(item, filedir, address, args.cpu_id):
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||||
return False
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||||
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||||
except Exception as e:
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||||
try:
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||||
|
|
|
|||
33
README.md
33
README.md
|
|
@ -1,33 +0,0 @@
|
|||
Boufallo Lab Flash Command - Open Source Version
|
||||
================================================
|
||||
|
||||
This repo contains the completed work of "open sourcing" the Boufallo Lab
|
||||
flash command. This utility is provided in binary form under Apache 2.0 License.
|
||||
It is a [pyinstaller]() executable, so I have unpacked the binary, run it
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||||
through several Python 3.7 decompilers, and made a few adjustments. Primary
|
||||
changes:
|
||||
|
||||
* The libs/bflb_configobj.py file has been completely rewritten. It appears
|
||||
to have been a handwritten recursive descent parser for ini files that
|
||||
include the ability to have complex objects. In reality, the configuration
|
||||
that seems to exist for flashing is simple key/value pairs in sections,
|
||||
so 2k+ lines of code were removed and replaced with simple shims to the
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||||
python standard library
|
||||
* Some additional logs were added to the output to let the user know what
|
||||
files were being used. This was necessary to debug the decompiler output
|
||||
and I thought they were useful
|
||||
|
||||
I have licensed this as Apache 2.0 to reflect the origin license. This is tested
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||||
and working with BL616 MCU. The flashing host computer was running Linux. This
|
||||
is good for my needs and it should work for other MCUs/other flashing hosts.
|
||||
However, I do not intend to provide support for anything beyond my own needs.
|
||||
I am happy to take pull requests!
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||||
|
||||
Decompilers used
|
||||
----------------
|
||||
|
||||
* [decompyle3](https://pypi.org/project/decompyle3/): This was the primary decompiler for the project
|
||||
* [unpyc3](https://github.com/andrew-tavera/unpyc37.git): unpyc3 did a better job on 2 or 3 of the files (see logs)
|
||||
* [pycdc](https://github.com/zrax/pycd): While not used on any files, it served
|
||||
as a useful comparison tool. A few miscompiles from decompyle3 were more
|
||||
obvious because both pycdc and unpyc3 disagreed with the decompyle3 output
|
||||
BIN
chips/bl602/img_create/whole_img.pack
Normal file
BIN
chips/bl602/img_create/whole_img.pack
Normal file
Binary file not shown.
BIN
chips/bl616/img_create/whole_img.pack
Normal file
BIN
chips/bl616/img_create/whole_img.pack
Normal file
Binary file not shown.
|
|
@ -1228,8 +1228,6 @@ class BaseEflashLoader(object):
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|||
cfg_dir = app_path + '/utils/flash/' + self.chip_type + '/'
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conf_name = self.get_suitable_conf_name(cfg_dir, flash_id)
|
||||
if os.path.isfile(cfg_dir + conf_name) is False:
|
||||
printf('ERROR: Could not find flash configuration for chip')
|
||||
printf('File must be at: %s' % cfg_dir + conf_name)
|
||||
return False
|
||||
return True
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 800
|
||||
blk32k_erase_time = 3000
|
||||
blk64k_erase_time = 4000
|
||||
page_prog_time = 10
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 4
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 4
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0x12
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 4
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 4
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0x12
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 5
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x00
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x00
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0x00
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x00
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x00
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0x00
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x00
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x00
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0x00
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x51
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 45
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 45
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 45
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xeb
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 800
|
||||
blk32k_erase_time = 3000
|
||||
blk64k_erase_time = 4000
|
||||
page_prog_time = 10
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xcd
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 800
|
||||
blk32k_erase_time = 3000
|
||||
blk64k_erase_time = 4000
|
||||
page_prog_time = 10
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xA0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x20
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x20
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x20
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x20
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x20
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 6000
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x0b
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 0x11
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 0
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 400
|
||||
blk32k_erase_time = 1600
|
||||
blk64k_erase_time = 2000
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x5e
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 8
|
||||
qe_data = 0
|
||||
|
|
@ -1,73 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xba
|
||||
io_mode = 0x14
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
power_down_delay = 3
|
||||
qe_data = 0
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x68
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xa1
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 800
|
||||
blk32k_erase_time = 3000
|
||||
blk64k_erase_time = 4000
|
||||
page_prog_time = 10
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc8
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x9d
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x00
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x06
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xc2
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0xc0
|
||||
de_burst_wrap_cmd_dmy_clk = 0x00
|
||||
de_burst_wrap_code_mode = 0
|
||||
de_burst_wrap_code = 0x10
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 0
|
||||
qe_bit_pos = 6
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa5
|
||||
burst_wrap_cmd = 0xc0
|
||||
burst_wrap_dmy_clk = 0x00
|
||||
burst_wrap_data_mode = 0
|
||||
burst_wrap_code = 0x02
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0x85
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xeb
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0xa0
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xff
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 800
|
||||
blk32k_erase_time = 3000
|
||||
blk64k_erase_time = 4000
|
||||
page_prog_time = 10
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
[FLASH_CFG]
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
mfg_id = 0xef
|
||||
io_mode = 4
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
write_enable_cmd = 0x06
|
||||
wel_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
wel_reg_read_len = 1
|
||||
wel_reg_write_len = 2
|
||||
qe_reg_index = 1
|
||||
qe_bit_pos = 1
|
||||
qe_reg_write_len = 1
|
||||
qe_reg_read_len = 1
|
||||
busy_reg_index = 0
|
||||
busy_bit_pos = 0
|
||||
busy_reg_read_len = 1
|
||||
rsvd1 = 0
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x31
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
cont_read_support = 1
|
||||
cont_read_code = 0x20
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
cont_read_exit_code = 0xf0
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
sector_size = 4
|
||||
page_size = 256
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 1
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
chip_erase_time = 65535
|
||||
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Reference in New Issue
Block a user